www.riscos.com Technical Support:
Early versions of ARM 7 series processors corrupt the cache when code performs a store multiple to the last word in a cache line, which is in the cache, but is not written through the write buffer. These processors are fitted only to a very few Acorn computers.
To work round this problem, all areas of memory that can be cached must also use the write buffer. This requires that:
You must ensure that your own code follows these guidelines.
RISC OS does not contravene these guidelines, except for versions of ROMPatch supplied with RISC OS 3.5, a fixed version of which has been supplied with the very few processor upgrades that may show this fault.