Memory modules (SIMMs) for the Acorn Risc PC

72 pin SIMM with 32 bit data.Speed: 70ns (or faster)

Memory sizes:

  • 2 MBytes (512K * 32)
  • 4 MBytes ( 1M * 32)
  • 8 MBytes ( 2M * 32)
  • 16 MBytes ( 4M * 32)
  • 32 MBytes ( 8M * 32)
  • 64 MBytes ( 16M * 32) When available
  • 128 MBytes ( 32M * 32) When available

Either or both SIMM sockets may be used, with any mix of sizes provided a minimum of 2MBytes is fitted.

NOTE: The Risc PC was designed to take two SIMMS. Acorn do not recommend the use of more than two SIMMS with this machine. Acorn currently have no plans to release a Risc PC which has both SIMM sockets populated.

There are a number of other specifications that are required, although many SIMMs meet them:

1. The maximum physical size is 108mm long, 36.2mm wide and 9.4mm thick

2. The DRAM must use the same number of bits for both row and column address (square array) ie Ra<8:0> for 2 MByte Ra<9:0> for 4 or 8 MByte Ra<10:0> for 16 or 32 MByte. There are a few 16MByte and 32MByte SIMMs that use Ra<11:0> for the row address and Ra<9:0> for the column address. Although these parts are sometimes sold for use with Apple equipment, they are non-standard, and are unsuitable for use with the Acorn Risc PC as they will appear to the computer as a 4 or 8Mbytes.

As a guide the Hitachi 16 & 32MByte SIMMs use 5117400 parts which are correct. Some makes of 16/32 MByte SIMM use unsuitable 5116400 parts.

Another terminology used to differentiate between the two types is the number of refresh cycles required. The correct parts used in the 16 & 32 MByte SIMMs require 2048 refresh cycles, where as the incompatible parts (with an additional address line Ra<11:0>) require 4096 refresh cycles.

3. Acorn do not recommend the use of SIMMs that are made from more than 16 memory devices (eg 8 on each side) as they are likely to exceed the maximum load specification:

 Address    128pF
 WE         140pF
 CAS or RAS  59pF
 Data bus    29pF

Older 'composite' SIMMs that are made from more than 16 devices should be avoided.

4. The DRAM devices used on the SIMM must support 'fast page mode' and 'CAS before RAS' refresh

5. The 4 ID bits on pin 67, 68, 69 & 70 are not used, and so may be in any state on the SIMM. However, non-standard SIMMs with 5 (or more) ID bits should not be used. (eg Samsung 32MByte KMM5328100)

6. Contact pads may be either gold or solder.

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